Exploring the limits of contact hole patterning with high-NA EUV lithography

Interconnects will remain a key enabler of scaling as logic nodes advance toward the nanostack (vertically stacked gate-all-around transistors) era. However, reducing contact hole critical dimensions will impose tighter local critical dimension uniformity (LCDU) requirements and increasingly stringent defectivity control. This work presents an assessment of contact hole patterning capabilities using high numerical aperture (NA = 0.55) EUV lithography at 36nm, 32nm, and 28nm pitch. The performance advantage of high NA EUV over low NA (0.33) EUV was quantified using metrics such as pitch and CD scaling, mask error enhancement factor (MEEF), depth of focus (DOF), LCDU, and stochastic defectivity. For positive-tone chemically amplified resist systems, a best-in-class material was selected using low NA EUV and then evaluated at high NA, compared against a baseline metal oxide resist system. High NA EUV reticles with conventional TaBN and low-index phase shift mask absorbers, featuring both dark-field and bright-field contact hole patterns, were used with two illuminators to assess image contrast and compare results to simulations. For the chemically amplified resist, the impact of resist thickness was evaluated, considering the reduced focus budget of high NA optics and the ability to transfer the ultrathin organic imaging layer through the etch stack. Post-etch contact hole patterning was further modulated by adjusting the underlying stack and etch transfer process, particularly when selecting an etch bias that balanced contributions from scummed versus merged contact holes to overall stochastic defectivity. This study highlights the scalability potential of single-exposure high NA EUV lithography for aggressive contact hole dimensions and identifies key factors requiring optimization to maximize performance.