Design of a low-power embedded feature extraction architecture for multimodal image recognition
Abstract
To enhance the energy efficiency of multimodal image recognition systems on embedded devices, this study constructs a low-power feature extraction architecture tailored to the differences among RGB, infrared, and depth modalities. It investigates a collaborative optimization strategy integrating modality-adaptive encoding, low-resolution cross-modal alignment, operator reconstruction, and instruction-level mapping mechanisms. We analyze the impact of modal heterogeneity on feature alignment and propose methods for gated adjustment and structural compression within a unified framework. Practical deployment and testing on heterogeneous platforms demonstrate that the proposed architecture achieves improved accuracy in tri-modal fusion recognition tasks while reducing average energy consumption per frame by 34.2% and latency by 27.5%, exhibiting robust deployment stability and power control capabilities.
Fields of Study & Subjects
Advanced Neural Network Applications
Advanced Image and Video Retrieval Techniques
Low-power high-performance VLSI design
Publication details
- Journal / source
- International Conference on Signal Processing and Virtual Reality Technology (SPVRT)
- Pages
- 65–65
- Publication date
- 10 February 2026
- Language
- EN