A 0.821 ppm/°C temperature coefficient, -88dB PSR, low noise bandgap reference for battery management system

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Authors: Qibang Geng, Song Yuan, Xi Jiang, Zhaoheng Yan, Xinbin Zhan, Yanzuo Li, Xiaowu Gong
Cited by: 0
References: 13

Abstract

Serving as the fundamental building block for high-precision analog and mixed-signal integrated circuits (IC), the performance metric of the bandgap reference (BGR) is critical for system-wide accuracy and stability. This work introduces a Kuijk BGR implemented in SMIC 180nm BCD technology, specifically optimized for superior power supply rejection ratio (PSRR), minimal output noise, and exceptional temperature stability. To boost PSRR, a cost-effective pre-modulation stage is incorporated, achieving robust suppression of supply voltage variations. Noise reduction strategies involve the combination of an NPN-based differential input pair, a resistive tail current source, the utilization of source degeneration resistors in the current mirrors, and optimized BJT sizing. These techniques collectively mitigate both 1/f and thermal noise components. A key innovation for realizing ultra-low temperature coefficient (TC) is the proposed three-segment curvature compensation method. It divides the extended temperature range -40°C to 125°C into high, intermediate, and low segments. By dynamically injecting independently trimmable compensation currents into the high and low-temperature segments, the remaining high-order nonlinear temperature dependencies of the reference voltage are accurately canceled. Comprehensive corner and temperature simulations confirm the performance: the output voltage exhibits a trimmable TC down to 0.44ppm/°C, a DC PSRR exceeding 88dB, integrated noise of less than 0.92 μVrms in the 0.1 Hz-10 Hz band, and less than 3.5μVrms in the 10 Hz-10 kHz band. The developed BGR architecture offers a viable solution for demanding applications, including advanced data converter and PMIC.

Fields of Study & Subjects

Analog and Mixed-Signal Circuit Design Low-power high-performance VLSI design Radio Frequency Integrated Circuit Design

Publication details

Journal / source
International Conference on New Power System and Power Electronics (NPSPE)
Pages
62–62
Publication date
10 March 2026
Language
EN