Advancing the Stability and Read/Write Operations of 5T Static Random Access Memory Cells Utilizing Dual-Chirality Gate-All-Around Carbon Nanotube Field-Effect Transistors

Static Random Access Memory Cells (SRAM) offers excellent flexibility in logical circuit design and is widely adopted in modern high-performance systems. However, traditional SRAM suffers from significant instability during read and write operations due to increased threshold voltage variability and sensitivity to process, voltage and temperature fluctuations, which degrade both performance and reliability. To address these issues, this paper proposes a new Advancing the Stability and Read/Write Operations of 5T Static Random Access Memory Cells Utilizing Dual-Chirality Gate-All-Around Carbon Nanotube Field-Effect Transistors (ASRWO-DCGAA-CNTFET), which enhances the stability and read/write functionality of 5T SRAM using Dual-Chirality Gate-All-Around CNTFETs. The proposed Dual-Chirality GAA-CNTFET enables precise control over the threshold voltage, thereby improving the Static Noise Margin (SNM) and optimizing read and write operations while enhancing overall stability. During read operations, this approach effectively prevents output bit data corruption, and during write operations, it reliably overwrites existing data with new input. The ASRWO-DCGAA-CNTFET method achieves a reduction in leakage current by 13%, 22% and 20% compared to existing designs, including the Ultra-Low Power 5T-SRAM Cell utilizing CNTFET-based Read/Write Assist Techniques (5TSRAM-CNTRWA), the Improved Read/Write Stability-Dependent Level Shift 5T Ternary SRAM with Enhanced Gate Diffusion Input BWGCNTFET (IRWS-5TSRAM) and the FinFET-based low-power, stable 8T SRAM with high yield (FET-8TSRAM), respectively.