Synchronized CPU-FPGA Tracing for Heterogeneous Platforms

Heterogeneous CPU-FPGA systems are difficult to debug because hardware logic and software execute under different clocks, tools, and trace formats. Vendor-provided logic analyzers offer only short, trigger-based captures and lack correlation with software events. We propose a continuous, low-intrusion co-tracing framework that (i) instruments RTL with configurable AXI probes on the FPGA, (ii) collects kernel and user-space events on the host via LTTng, (iii) streams FPGA events over AXI4-Stream and PCIe DMA to the host, and (iv) emits multi-clock Common Trace Format (CTF) traces, unifying hardware and software activity on a single timeline. A lightweight synchronizer injects periodic beacons to estimate clock offset and drift, enabling causal correlation between driver I/O, interrupts, and scheduler activity on the CPU and AXI transactions in hardware within Trace Compass. Our prototype on a AMD Alveo U280 sustains 6.8 Gb/s event throughput on a PCIe 3.0 x1 link while consuming only 2.3% LUTs and 4.9% FFs for 100 probes at 250 MHz.