NysX: An Accurate and Energy-Efficient FPGA Accelerator for Hyperdimensional Graph Classification at the Edge

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Authors: Jebacyril Arockiaraj, Dhruv Parikh, Viktor K. Prasanna
Cited by: 0

Abstract

Real-time, energy-efficient inference on edge devices is essential for graph classification across a range of applications. Hyperdimensional Computing (HDC) is a brain-inspired computing paradigm that encodes input features into low-precision, high-dimensional vectors with simple element-wise operations, making it well-suited for resource-constrained edge platforms. Recent work enhances HDC accuracy for graph classification via Nyström kernel approximations. Edge acceleration of such methods faces several challenges: (i) redundancy among (landmark) samples selected via uniform sampling, (ii) storing the Nyström projection matrix under limited on-chip memory, (iii) expensive, contention-prone codebook lookups, and (iv) load imbalance due to irregular sparsity in SpMV.

Fields of Study & Subjects

Embedded Systems Design Techniques Advanced Neural Network Applications VLSI and FPGA Design Techniques

Publication details

Journal / source
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
Pages
140–140
Publication date
5 February 2026