OpenPCIe: An Open-Source PCIe Controller

Peripheral Component Interconnect Express (PCIe) is a critical interface for Field Programmable Gate Array (FPGA) based accelerators, yet existing controller solutions are often proprietary, costly, and/or incompatible with open-source workflows. We present a fully open source PCIe Controller, written in synthesizable Verilog and optimized for Field Programmable Gate Array deployment. The core is verified using a Python-COCOTB and pyuvm-based testbench with a modeled Root Complex, complete with data packet generation, and automated checks for enumeration, flow control, and retry mechanisms. On a Xilinx AC701 (XC7A200T), the design achieves