CAD-in-the-Cloud: Protecting FPGA Design Privacy via Redacted Netlists
Abstract
We propose a design flow to hide FPGA design functionality by redacting key properties during cloud compilation. The original design functionality can be restored post-implementation, with no change to the produced bitstream.
Fields of Study & Subjects
Physical Unclonable Functions (PUFs) and Hardware Security
Security and Verification in Computing
Embedded Systems Design Techniques
Publication details
- Journal / source
- ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
- Pages
- 41–41
- Publication date
- 5 February 2026