GPU Partitioning, Power, and Performance of the AMD MI300A

Modern GPUs play a crucial role in accelerating a wide range of computational workloads. It is important to understand the performance limitations of these workloads on specific hardware to optimize them or to choose more appropriate configurations or algorithms. The world’s fastest supercomputer, El Capitan, consists of 11,520 AMD MI300A Accelerated Processing Units (APUs). The MI300A APU supports three logical partitioning modes—SPX, TPX, and CPX, for single, triple, and core-partitioned, respectively—to optimize compute resource allocation, offering new opportunities for performance tuning. In this work, we evaluate the performance of the MI300A APUs in different GPU partitioning modes and demonstrate the performance impact across a wide range of computational kernels represented in the RAJA Performance Suite. We use hardware counter analysis to explain the up to 30% difference in execution time in different modes for stencil kernels. We also explore the dynamic power sharing among the accelerator compute units of the APU. Power sharing enables the APU to dynamically allocate power resources between the CPU and GPU based on the workload execution behaviors. We observed throttling of the power resulted in up to 20% slowdown particularly for FLOP-bound kernels.