Parameterized Hardware Design with Latency-Abstract Interfaces
Abstract
Hardware designs must use latency-insensitive (LI) interfaces when timing is input-dependent. When timing is input-independent, designs should use latency-sensitive (LS) interfaces for maximum performance. However, designs commonly use LI interfaces to integrate with externally generated LS modules--from, e.g., IP generators, high-level synthesis, or domain specific languages. In every fully integrated design, such uses of LI represent pure overhead. The challenge is that generators can dramatically change timing interfaces of the modules to meet performance objectives, and LI interfaces act as a useful design abstraction and enable timing adaptation.
Fields of Study & Subjects
Embedded Systems Design Techniques
VLSI and Analog Circuit Testing
Radiation Effects in Electronics
Publication details
- Journal / source
- Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2
- Publisher
- ACM
- Pages
- 1382–1395
- Publication date
- 10 March 2026
- Language
- EN