DGEMM using FP64 Arithmetic Emulation and FP8 Tensor Cores with Ozaki Scheme

The rapid growth of AI workloads has driven the development of specialized accelerators optimized for the low-precision matrix multiplication required by modern AI models. These devices are generally not designed for scientific applications and often lack FP64 capability or provide only limited FP64 performance. Even general-purpose GPUs, originally adopted for heterogeneous scientific computing, have increasingly prioritized AI workloads at the expense of FP64 performance. Consequently, leveraging such accelerators for FP64-based scientific computing has emerged as a new challenge in heterogeneous systems. This study addresses this challenge by improving an FP64 matrix multiplication (DGEMM) emulation method for modern AI-oriented processors. The Ozaki scheme (Ozaki et al., 2012) enables DGEMM computation using low-precision GEMM. Earlier work demonstrated that the scheme could exploit FP16 matrix-multiplication units (Tensor Cores) on GPUs, and later achieved substantial speedups using newly introduced 8-bit integer Tensor Cores. However, recent AI-oriented hardware increasingly emphasizes low-precision floating-point operations such as FP8 rather than low-precision integers. Motivated by this trend, this study revisits the use of low-precision floating-point matrix units in the Ozaki scheme, focusing specifically on FP8 Tensor Cores available on NVIDIA Blackwell GPUs. Additionally, to support processors without native FP64 units, we replace the FP64 arithmetic required in portions of the scheme with integer-based FP64 arithmetic emulation. Furthermore, to accelerate existing FP16-based implementations, we explore blocking along the inner-product dimension. This study provides a step toward enabling effective use of emerging AI accelerators for FP64-based scientific computing.