Energy-Efficient QSD Multiplier with High-Speed Binary-to-Radix-4 Recoding for Solid State Biosensor Signals

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Authors: Muralidharan V, S. Lekashri, A. N. Duraivel, Ravichandran V
Cited by: 0
References: 13

Abstract

The increasing usage of solid-state temperature and biosensors in embedded and real-time monitoring systems has intensified the demand for low-power arithmetic units capable of continuous signal processing. The rapid growth of data processing and storage demands requires advanced arithmetic architectures beyond traditional binary systems. Higher radix representations, such as radix-4, are suitable for low-power real-time sensor processing due to reduced switching activity and carry propagation. Multipliers impact the speed and energy efficiency of VLSI processors. This work proposes an energy-aware Radix-4 QSD multiplier with parallel 2-bit grouping and local carry generation, enabling efficient processing of temperature and biosensor signals. The recoded QSD digits are then applied to an optimized Radix-4 QSD adder–multiplier data path implemented and evaluated using the T-SPICE simulator in 90-nm CMOS technology. The experimental results show that the Radix-4 QSD approach achieves notable improvements in the average power and the static power, consuming only about 6% of the average power and 33% of the static power required by the existing QSD CLA-based design. Across the wide range of operating temperatures, the proposed architecture maintains stable performance making it suitable for real-time sensor-driven signal-processing tasks.

Fields of Study & Subjects

Low-power high-performance VLSI design Analog and Mixed-Signal Circuit Design Cryptography and Residue Arithmetic

Publication details

Journal / source
ECS Journal of Solid State Science and Technology
Volume
15
Issue
3
Pages
037001–037001
Publication date
17 February 2026
Language
EN