Resource-Efficient and Robust Inference of Deep and Bayesian Neural Networks on Embedded and Analog Computing Platforms

While modern machine learning has transformed numerous application domains, its growing computational demands increasingly constrain scalability and efficiency, particularly on embedded and resource-constrained platforms. In practical deployments, neural networks must not only operate efficiently but also provide reliable predictions when faced with distributional changes or previously unseen data. Bayesian neural networks offer a principled framework for quantifying uncertainty, but their higher computational demands further compound these challenges. This work advances resource-efficient and robust inference for both conventional and Bayesian neural networks through the joint pursuit of algorithmic and hardware efficiency. The former reduces computational cost through model compression and approximate Bayesian inference, while the latter optimizes mapping to digital accelerators and explores novel analog hardware platforms, bridging algorithmic optimization and physical realization. The first contribution introduces the Galen framework, which performs automatic, layer-specific compression guided by sensitivity analysis and hardware-in-the-loop feedback, jointly optimizing quantization and pruning to balance accuracy and efficiency on embedded devices. As analog accelerators offer additional efficiency gains at the cost of noise, their modeling exposes device imperfections, while a layer-wise analysis reveals how networks learn to tolerate such effects during training. This work extends noisy training to nonstationary conditions, thereby enhancing robustness and stability in analog hardware. A complementary line of work advances probabilistic inference. Building on insights into Bayesian-neural-network design and training, this work develops analytic and ensemble-based approximations that replace costly sampling, integrates them into a compiler stack, and optimizes them for probabilistic inference on embedded hardware. Finally, probabilistic photonic computing introduces a novel paradigm in which controlled analog noise serves as an intrinsic entropy source, enabling ultrafast and energy-efficient probabilistic inference directly in hardware. Together, these studies demonstrate how efficiency and reliability can be advanced jointly through the co-design of algorithms, compilers, and hardware, laying the foundation for the next generation of trustworthy and energy-efficient machine-learning systems.