FPGA implementation and bit error rate analysis of the forward error correction algorithms in voice signals
Abstract
The idea of codes (VITERBI) is broadly utilized as a part of the wireless communication system as a result of their less complex nature in the decoding of transmitted message. This paper attempts to develop a performance analysis of the decoder by methods for bit error rate (BER) examination. The Galois field based decoder calculation is only utilized as a part of the communication systems. The decoder calculation-based Viterbi based decoder is carried out using field programmable gate arrays (FPGA) and MATLAB. This paper looks at the execution examination of both the calculations. The reconfigurable processor called Microblaze on the Spartan 3E FPGA is utilized for this purpose. MATLAB based code is used to see the BER analysis after the FPGA implementation output.
Fields of Study & Subjects
Error Correcting Code Techniques
Embedded Systems and FPGA Applications
Embedded Systems Design Techniques
Publication details
- Journal / source
- International Journal of Reconfigurable and Embedded Systems (IJRES)
- Volume
- 15
- Issue
- 1
- Pages
- 86–86
- Publication date
- 1 March 2026
- Language
- EN