Hardware Implementation for Cryptography

Today, cryptography is one of the fundamental methods of information protection within the critical infrastructure of the state. Symmetric algorithms are quite fast, but their main disadvantage lies in the challenge of secure key distribution. Asymmetric cryptography solves this problem, but its algorithms are not as fast (by 2–3 orders of magnitude) as the symmetric ones. Slow algorithms, even if they are cryptographically robust, limit practical applications, especially where performance, latency, and resource efficiency are important (e.g., in critical infrastructure). Therefore, when choosing a crypto algorithm, it is important to consider not only its security but also its speed as a key factor in system adaptability and efficiency. This chapter considers the circuit solution of the device of modular number squaring, where, at each step, two digits of the squared number are analyzed. For this purpose, the device includes residue formers and a multiplier that operates on a pair of digits using partial modulo residues. The developed device can be included in the block of encryption and decryption of data of cryptosystems with a public key (systems RSA, El-Gamal, Fiat–Shamir, Schnorr, Okamoto, etc.) to increase their speed of operation.