Flash memory controller design using System Verilog

The research paper mainly aims to design and verify flash memory using System Verilog with a prominence on increasing the reliability and efficiency of processing systems. NOR and NAND memory are non-volatile storage technologies that are used in many applications due to their high storage density, non-volatile nature and low power consumption. NAND flash is well known for its faster page access rate and compact size making it ideal for high-density applications. NOR flash provides faster direct access memory capability, which is dominant for running code directly from memory. It is also considered more reliable than NAND, with each cells being more flexible and supports more program/erase cycles. The primary objective of the paper is to design and verify the flash memory controller that supports both NAND and NOR functionality using System Verilog. This involves the devleloping and implementation of key components such as generator, agent, mailbox, bus functional model, scoreboard and monitor The scope of the paper also discusses the use of software and hardware engineering techniques to address the major challenges of flash controllers. This approach achieved 96.59% code coverage, and 100% functional coverage is evaluated using the Metric Calculator tool from Cadence.