Simulation of Influence of Traps on the Operation p-i-p and p-i (M)-p Diamond Structures

The various kinds of field transistors (FET) were created on diamond and diamond films [ 1-6 ]. However characteristic of FET, using p-type diamond as working areas, is limited by high activation energy of boron in diamond, 0.35 eV, and significant reduction of hole mobility owing to scattering on ionized impurity at high concentration of dopant. These restrictions can be removed in devices, using dielectric diamond as work- ing area. The work of such device is based on injection of charge carriers in i-diamond and their transport in a space-charge limited current mode. Effect of holes injection in i-diamond from p-area and SCLC mechanism already was observed in p-i-p structures in MIS-diodes [ 7-11 ]. A principle of work of p-i-p structure on diamond also was stated in [ 12 ], FET with Schottky gate was demonstrated on Ha type natural diamond [ 7 ]. The modeling of p-i-p transistor with S1O2 gate insulator was spent in [ 13 ] neglecting traps in i-diamond. However presence of capture levels, which are always present in natural diamonds and diamond films, renders significant influence on SCLC [ 14 ].