VHDL modeling of MPEG audio layer 1 decoder
Abstract
The decoding of the voice audio bit stream is an issue in terms of real-time transmission of high quality voice audio over the Internet. A stand-alone chip to perform decoding is a better solution over software approach. The MPEG audio compression provides high compression with minimal loss. This paper describes a VHDL model of MPEG audio layer 1 decoder that perform concurrent processing while receiving voice quality audio input bit stream at a constant bit rate and simultaneously producing a stream of 8-bit monopole PCM samples at a constant sampling frequency in real time to ease the description, verification and hardware realization. Simulation and compilation is done to verify the functionality and validity of the design outputs. To test the feasibility and correctness of the design the output is compared with the calculated output results from Perl implementation that proves the effectiveness of the design.
Fields of Study & Subjects
Embedded Systems and FPGA Applications
Embedded Systems Design Techniques
Digital Filter Design and Implementation
Publication details
- Journal / source
- CRC Press eBooks
- Pages
- 567–574
- Publication date
- 24 February 2026
- Language
- EN
- Document type
- Book chapter