A background current suppression strategy based on redundant segmented DAC

This paper presents a background current suppression strategy based on a redundant segmented digital-to-analog converter (RS DAC). The utilised DAC employs thermometer coding for the lower segment and binary coding for the higher segment, incorporating redundancy at the segment interface to enhance robustness against mismatch. To benchmark our approach, we conducted a Monte Carlo analysis. The results demonstrate that our suppression scheme achieves an order-of-magnitude improvement in mismatch tolerance. Additionally, A dedicated calibration algorithm was developed specifically for the RS DAC. To validate the proposed strategy, a capacitor trans-impedance amplifier (CTIA) chip was designed based TSMC 180nm process. The measurement results confirm that the background current suppression strategy effectively reduces background current, offering a practical solution for detectors experiencing high background levels.