A 94.52 dBc SFDR 89.86 dB SNDR high-linearity bootstrapped switch for SAR ADC

This letter proposes a high-linearity bootstrapped switch designed for application in SAR ADC. The proposed switch introduces an auxiliary capacitor branch to the conventional bootstrapped switch. By connecting other branches on the bootstrap signal channel to the auxiliary capacitor branch, the capacitor parasitic effect on the bootstrap signal channel is diminished, thereby reducing the overall parasitic capacitance of the circuit and improving both the linearity of the sampling switch and its response speed to signals. Simulation verification based on a 55nm CMOS process library demonstrates that at a sampling frequency of 10 MHz, the proposed structure achieves an Signal-to-Noise-and-Distortion Ratio (SNDR) of 89.86 dB, and an Spurious-Free Dynamic Range (SFDR) of 94.52 dBc.