A 4.6 mW 32 Gb/s NRZ tunable equalizer with active inductor based CTLE and 2-tap DFE in 65 nm CMOS
Abstract
This work presents a 32 Gb/s tunable equalizer implemented in 65 nm CMOS. The design combines an active inductor CTLE with NCC and a source-follower buffer, overcoming the gain-bandwidth trade-off of traditional CTLEs while maintaining stable behavior under PVT variations with a DC gain variation of 5.6 dB. A 2-tap full-rate DFE further suppresses residual ISI. The results show that the proposed equalizer compensates for a 29 dB channel loss at the 16 GHz Nyquist frequency. It achieves an eye opening of 204 mV vertically and 0.77 UI horizontally at 32 Gb/s NRZ. The post-layout area is only 0.0015 mm². Furthermore, with a power consumption of only 4.6 mW, the equalizer achieves an exceptional energy efficiency of 0.14 pJ/bit.
Fields of Study & Subjects
Advancements in PLL and VCO Technologies
Radio Frequency Integrated Circuit Design
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- IEICE Electronics Express
- Volume
- 23
- Issue
- 5
- Pages
- 20250677–20250677
- Publication date
- 13 January 2026
- Language
- EN