A high-speed and low-power level shifter for LVDS transmitters

In low-voltage differential signaling (LVDS) transmitters, data transfer between the core and I/O voltage domains across a large supply voltage difference requires high-speed and low-power level shifters (LSs). This paper proposes a level shifter (LS) that combines cross-coupled and improved current-mirror topologies to address the issues of current contention in the cross-coupled level shifter (CCLS) and limited swing in the current-mirror level shifter (CMLS). In the proposed LS, the improved CMLS branch employs an active-inductor structure and an auxiliary pull-up transistor to accelerate conversion, whereas current-limiting transistors inserted in the CCLS branch further reduce current contention. Implemented in a 55-nm technology, the proposed LS achieves 1.2 V-to-3.3 V level conversion at 800 MHz input frequency with a propagation delay of 249 ps and a dynamic power of 1.84 mW.