Low Power Design Techniques for Digital Logic Circuits.

With the rapid increase in the density and size of chips and systems, area and power dissipation have become critical concerns in Very Large Scale Integrated (VLSI) circuit design. Low-power design techniques are essential for today's VLSI industry. The history of symbolic logic and some typical techniques for finite state machine (FSM) logic synthesis are reviewed. State assignment is used to optimize area and power dissipation for FSMs. Two cost functions, targeting area and power, are presented. The Genetic Algorithm (GA) is used to search for a good state assignment to minimize the cost functions. The algorithm has been implemented in C. The program can produce better results than NOVA, which is integrated into SIS by UC Berkeley, and other published approaches in both area and power, as tested by MCNC benchmarks. Flip-flops are the core components of FSMs. The reduction of power dissipation from flip-flops can significantly reduce power consumption in digital systems. Three new kinds of flip-flops, called differential CMOS single edge-triggered flip-flops with clock gating, double edge-triggered flip-flops, and multiple-valued flip-flops employing multiple-valued clocks, are proposed. All circuits are simulated using PSpice. Most researchers have focused on developing low-power techniques in AND/OR- or NAND/NOR-based circuits. Low-power techniques for AND/XOR-based circuits are still in their early stages of development. To implement a complex function involving many inputs, a form of decomposition into smaller subfunctions is required so that the subfunctions fit into the primitive elements used in the implementation. A best-polarity-based XOR gate decomposition technique has been developed, targeting low power consumption using the Huffman algorithm. Compared to published results, the proposed method shows considerable improvement in power dissipation. Furthermore, Boolean functions can be expressed by Fixed Polarity Reed-Muller (FPRM) forms. Based on polarity transformation, an algorithm is developed and implemented in the C programming language which can find the best polarity for power and area optimization. Benchmark examples of up to 21 inputs run on a personal computer are provided.