"Experimental Data for A Memory Management Scheme of STM32U575 Embedded Systems (Latency, Fragmentation Rate, Robustness)"

"This dataset supports the manuscript entitled 'A Memory Management Scheme for STM32U575 Embedded Systems Integrating Adjacent Block Merging' (submitted to IEEE Embedded Systems Letters). It contains original experimental data generated from the STM32U575 development board, including three types of key records: 1) Memory allocation\/release latency logs (each entry records latency values under different task priorities); 2) Heap memory fragmentation rate curves (tracking fragmentation changes across 250 test rounds); 3) Robustness test records (verifying no memory leaks via a single execution of three scenarios: memory pool overflow, double free, wild pointer free). All data are saved in TXT (Plain Text) format for easy reading and reproducibility. The dataset is set to 'Non-Open Access'\u2014only reviewers and editors of the manuscript can access it to validate the study's conclusions. Detailed definitions of the data and its correlation with the manuscript's results are provided in the manuscript's 'Experimental Results' section."