A Digitally Programmable 2.4-GHz Background-Calibrated Fractional Output Divider with -80dBc Spur Suppression

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Authors: Bo Cheng, Jiangtao Xu, Huanhuan Qi, Yong Dai, Hui Cao, Jia Shen, Hong Zhang
Cited by: 0
References: 6

Fields of Study & Subjects

Advancements in PLL and VCO Technologies Radio Frequency Integrated Circuit Design Analog and Mixed-Signal Circuit Design

Publication details

Journal / source
SSRN Electronic Journal
Publication date
1 January 2026
Document type
Preprint