Protograph LDPC-Coded Superposition Modulation for MIMO Channels with Triple Mixed-ADC Architectures

This paper investigates an energy-efficient large-scale MIMO (LS-MIMO) receiver that integrates a triple mixedADC architecture with superposition modulation (SM) and protograph-based LDPC coding. The considered receiver employs groups of one-, two-, and five-bit ADCs to reduce front-end cost compared with full-resolution designs, while offering improved performance over a uniform 1-bit baseline in the tested simulations. A double-layer factor-graph detector isdeveloped, and analytical log-likelihood expressions are derived under an additive-quantization-noise model to account for attenuation and quantization effects across ADC tiers. A PEXIT-based analysis is adapted to study iterative-decoding thresholds and examine design parameters such as SM weights, protograph matrices, and resolution allocations across various MIMO configurations. Simulation results for representative setups align with the PEXIT predictions and show performancegains for the triple mixed-ADC configuration relative to a uniform 1-bit system. In line with previous findings, equalweight SM demonstrated competitive performance and, in the tested settings, yielded the lowest thresholds. The proposed analysis framework may be useful for guiding protograph design in systems that combine SM, mixed-resolution ADCs, and LS-MIMO.