Dynamic Bus Voltage Reconfiguration in a Two Stage Multi-Phase Converter for Fast Transient

This paper proposes a dynamic bus voltage transition method in a two-stage multi-phase buck converter for 48 V to point-of-load (PoL) applications. The proposed topology uses a bank of pre-charged switching capacitors at the output of the first-stage buck converter. This configuration helps to achieve an immediate intermediate bus voltage transition while supplying a (second-stage) multi-phase buck converter. This can substantially speed-up a large-signal transient recovery by adjusting the bus voltage to its highest voltage level. Thereafter, near steady-state, the bus voltage is set to its (lower) optimum value for improving the overall efficiency of the two-stage architecture. A higher bus voltage can reduce the output capacitance for the second-stage while retaining the (voltage) undershoot within the desired limit, which can reduce recovery time and current overshoot during a step-reference transient. The first-stage operates in open-loop, while the second-stage uses mixed-signal current mode control using a field programmable gate array (FPGA) device. A hardware prototype of the proposed architecture is made, and improved performance is demonstrated using simulation and experimental results. Index Terms-48 V-to-point of load (PoL) converters, two-stage architectures, intermediate bus voltage transition, switched capacitors, multi-phase converters, ultra-fast transient, efficiency.