An Efficient Secure Boot Mechanism Leveraging DICE as a Use Case

Secure boot ensures that only verified code is executed at boot time. It typically relies on asymmetric cryptography, which may pose boot time challenges for time-critical devices. We, therefore, propose an efficient secure boot (ESB) mechanism that extends the asymmetric cryptography-based approach with symmetric cryptography to reduce boot time. To demonstrate the practicality, an extended Device Identifier Composition Engine (DICE) architecture is leveraged as a use case. The evaluation results on an ARM-based MCU show that the proposed mechanism reduces boot time for regular boots while introducing a slightly higher overhead only during the initial boot phase.