A Ti/ITO Bilayer Gate Electrode Strategy for Improving Subthreshold Swing of Oxide Transistors

Subthreshold swing (SS) is a critical parameter governing the switching characteristics and power consumption of oxide transistors, especially for low-voltage and low-power integrated circuit applications. However, SS of oxide transistors is often limited by oxidation reactions at the gate electrode/dielectric interface. In this work, a Ti/InSnO (Ti/ITO) bilayer gate electrode strategy is proposed to address this issue. We fabricated ITO/ZnO transistors with the Ti, ITO, and Ti/ITO gate electrode. Compared with Ti-gated devices, both ITO-gated and Ti/ITO-gated devices exhibit a 35% reduction in SS, accompanied by enhanced bias stress stability. Through energy-dispersive X-ray spectroscopy and metal-insulator-metal (MIM) capacitor analysis, we found that the improvement in SS is attributed to the effective suppression of interfacial oxidation at the gate electrode/Al2O3 dielectric interface, which increases the effective gate oxide capacitance (Cox-eff) and reduces the interface trap density (NTrap). Furthermore, inverters based on the ITO/ZnO transistors were fabricated. Benefiting from the improved SS and reduced interconnect resistance, the Ti/ITO-gated inverters achieve a maximum voltage gain (Gainmax) of 215.3 V/V and a maximum static power consumption (Ps, max) of 0.9 μW at a supply voltage (VDD) of 3 V, corresponding to an 18% increase in Gainmax and a 65% reduction in Ps, max compared with ITO-gated inverters. Our findings provide a practical bilayer gate electrode strategy for achieving high-performance, low-power oxide transistors and circuits.