High-Temperature Storage Stability of PFAS and Non-PFAS Potting Materials Interfaces Under High-G Applications

ABSTRACT Electronics utilized in military defense applications increasingly depend on commercial off-the-shelf components, which require the use of potting materials to assure reliability and performance in high-G applications. Failure of the potting material interfaces often precedes the failure of component interconnects. Assurance of operational reliability for the potted assemblies requires methods to predict the propensity for failure at the potting material interfaces. Currently, there is a lack of data regarding interfacial damage thresholds necessary for predictive modeling, as well as the impact of prolonged high temperatures on the potential for interfacial potting failures. The research objectives of this study encompass measuring the interfacial fracture toughness of potting materials following sustained exposure to high temperatures for durations of up to one year, analyzing the effects of mode mixity using Compact Notched Beam (CNF) and End-Notched Flexure (ENF) measurements, and creating and validating high-g mechanical shock models. The potting and PCB interfaces have been subjected to high-temperature conditions of 100°C and 150°C. A circular printed circuit board, integrated with fine-pitch electronic packages and multilayer ceramic chip capacitors, has undergone potting testing under high G-shock loads. The parameters related to fracture toughness have been employed to derive cohesive zone parameters at the interface. Additionally, the influence of shock orientation on failure propensity has been investigated under shock orientations of 30° and 60°. A predictive model has been developed to assess interface and interconnect failures, which has been validated using experimental data obtained through high-speed imaging combined with digital image correlation to measure out-of-plane deformations and strains.