Optimal thermal placement of electronic functional blocks using symbolic algebra. A new application of Groebner Analysis

The paper presents a new idea and algorithm for arranging topography of functional blocks (hereinafter referred to as components) on an integrated circuit substrate, e.g. a digital processor, power circuit etc., in such a way as to minimize the mutual thermal interactions of individual components. Our analytical method finds the global optimum, which distinguishes it from numerical methods that can only find local minima. This leads to uniform temperature distribution, and therefore full use of the thermal properties of the electronic system, minimizing the maximum temperature on the substrate, and consequently allows for increasing the throughput. Presented approach is universal and allows for solving many similar global minimum search problems.