A Reduced Switch Single-Source Multilevel Inverter with GA-Based Selective Harmonic Elimination

Abstract Multilevel inverters (MLIs) are widely employed in medium- and high-power applications due to their ability to generate high-quality output voltage with reduced switching losses and electromagnetic interference. However, conventional MLIs topologies often suffer from increased circuit complexity, higher switch count and large total standing voltage (TSV), leading to increased cost and reduced reliability. To address these challenges, this paper proposes a novel reduced switch single source (RSSS) MLI topology capable of generating multiple voltage levels with a significantly lower number of power switches. For a nine-level RSSS MLI, a genetic algorithm selective harmonic elimination (GA-SHE) technique is employed to determine optimal switching angles, enabling effective elimination of dominant lower-order harmonics, particularly the fifth and seventh harmonics, while maintaining a high fundamental voltage component at low switching frequency. A detailed comparative analysis is carried out to demonstrate the advantages of the proposed topology in terms of switch count and TSV. The performance of the proposed RSSS MLI is validated through MATLAB/Simulink (MathWorks, Inc.) and real-time experimental implementation using a dSPACE CP1104 controller under no-load, resistive and resistive–inductive load (RL-load) conditions. Both simulation and experimental results confirm that the proposed inverter produces high-quality output voltage and current waveforms with harmonic distortion levels compliant with IEEE-519 standards.