Physically unclonable functions in digital integrated circuits

Objectives . Modules that implement physically unclonable functions (PUFs) within a digital chip facilitate the direct use of challenge–response pairs by device applications that can query and read the PUF without external tools or exposing data outside the chip. A PUF can be implemented using technological processes and components already applied in device fabrication. The first of two reviews on PUFs as elements of hardware security infrastructure, the present paper focuses on the formal description of PUFs and designs based on memory modules and timing analysis. Methods . The following quantitative indicators were applied to formally describe PUFs: computability, uniqueness, feasibility, cloning resistance, and protection against unauthorized access. Results . PUFs are considered as physical devices with unique signatures. A classification into three PUF groups is proposed: delay-based, memory-based, and analog. Typical examples of the first two groups are outlined. While delay-based solutions provide a large challenge–response space, they require symmetry and/or calibration. In contrast, memory-based PUFs are easier to implement in integrated circuits. With suitable post-processing, they can achieve high reproducibility, making them practical for many applications. Approaches to mitigating voltage and temperature variations are described along with examples of strong memory-oriented PUFs and circuit techniques that enhance resistance to attacks. Conclusions . PUF-based security technologies demonstrate significant potential, particularly for the Internet of Things. When combined with post-processing and compensation methods, PUFs constitute a mature and effective tool for hardware security.