An FPGA+DSP-Based On-Orbit Software Updating Architecture and Strategy for Satellite Payload Control Systems

This paper presents an architecture and strategy for on-orbit software updating of satellite payload control systems, based on a tightly coupled DSP and FPGA design. The architecture achieves tight coupling between the DSP and FPGA via the XINTF interface, integrating the DSP program and data into the FPGA bitstream. This enables synchronous updating of both chips with a single software package, significantly reducing both uplink data volume and update time. The system features a dual-flash redundant boot design and a mutual supervision mechanism between the DSP and FPGA, enabling cross-monitoring and autonomous reset, thereby significantly enhancing the system’s fault tolerance and reliability in orbit. Experimental results demonstrate a substantial improvement in fault recovery, with the weighted mean recovery time reduced from 27.09 s to 1.56 s, a relative improvement of 94.25% compared to conventional methods. Ground-based environmental tests confirm the system’s stability and engineering viability under extreme space conditions.