Loop-Block-Level Automatic Parallelization in Compilers

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Authors: Mengyao Chen, Qinglei Zhou, Kai Nie, Haoran Li
Cited by: 0
References: 13

Abstract

To address the issues of coarse-grained thread allocation and difficult load balancing in compiler automatic parallelization for processors, this paper proposes a loop-block-level automatic parallelization method for compilers based on an iterative compilation mode, using the SWGCC compiler on the Sunway platform. An automatic parallelization method that independently sets the number of threads for each loop block is designed within the SWGCC, which allocates threads to each parallelizable loop block in the program at a finer granularity. Meanwhile, iterative compilation is combined with a genetic algorithm to iteratively optimize the optimal thread group. Through operations such as the chromosome encoding of thread allocation schemes, weighted mutation operations based on loop execution proportions, and fitness function-guided population evolution, the optimal thread combination is efficiently searched for the loop block thread allocation algorithm. Experiments are validated on the Sunway processor using the SPEC2006 test suite. The results reveal that the loop-block-level compiler automatic parallelization algorithm combined with the evolutionary algorithm achieves a maximum performance score improvement of 19% and an average performance score improvement of 4% compared to the baseline automatic parallelization algorithm in the tests.

Fields of Study & Subjects

Parallel Computing and Optimization Techniques Distributed and Parallel Computing Systems Embedded Systems Design Techniques

Publication details

Journal / source
Applied Sciences
Volume
16
Issue
3
Pages
1533–1533
Publication date
3 February 2026
Language
EN