Efficient Layout Pattern Matching Based on Augmented Vertex Hashing
Abstract
Pattern matching is a key technique in the physical verification of integrated circuit designs and is widely used in lithographic hotspot detection. Existing pattern-matching algorithms face challenges in effectiveness and robustness, especially when processing complex patterns. We propose a pattern-matching algorithm based on augmented vertex hashing that correctly handles polygons with holes and supports fuzzy matching. For exact matching, our method encodes Manhattan polygons into fixed-length hash values using the augmented vertex representation, enabling fast polygon comparisons. For fuzzy matching, we formulate the problem as a constellation problem over augmented vertices and solve it efficiently using a cache-friendly algorithm based on a Bloom filter. Experiments show that our approach is more than 5× faster than the current state of the art on average.
Fields of Study & Subjects
VLSI and FPGA Design Techniques
Computational Geometry and Mesh Generation
Graph Theory and Algorithms
Publication details
- Journal / source
- Applied Sciences
- Volume
- 16
- Issue
- 5
- Pages
- 2240–2240
- Publication date
- 26 February 2026
- Language
- EN