A Low-Power High-Precision Discrete-Time Delta–Sigma Modulator for Battery Management System
Abstract
This paper presents a low-power high-precision Discrete-Time Delta–Sigma (DT-DS) analog-to-digital converter (ADC) for a Battery Management System (BMS), which is critical for monitoring key battery parameters such as voltage, current, and temperature. This design employs a second-order Cascade of Integrators FeedForward (CIFF) architecture using a hybrid chopping technique to effectively suppress 1/f noise and offset. Fabricated in a 180 nm Bipolar-CMOS-DMOS (BCD) process, the ADC achieves a peak signal-to-noise ratio (SNR) of 91.2 dB and a peak signal-to-noise-and-distortion ratio (SNDR) of 90.6 dB within a 600 Hz bandwidth, while consuming only 35 µA from a 1.8 V supply. This corresponds to a figure-of-merit (FoM) of 160.4 dB, calculated based on the SNDR, bandwidth, and power dissipation.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Advanced Battery Technologies Research
Sensor Technology and Measurement Systems
Publication details
- Journal / source
- Electronics
- Publisher
- MDPI AG
- Volume
- 15
- Issue
- 3
- Pages
- 535–535
- Publication date
- 26 January 2026
- Language
- EN