Design of Fast Leading-Edge Narrow Pulse Circuit Based on Avalanche Transistor Series Structure

Avalanche transistors are critical devices for generating fast leading-edge narrow pulses. However, the currently employed base-triggering method limits the output pulse amplitude of the series structure to the bias voltage. To overcome these limitations, this paper presents a novel circuit design based on the series structure of avalanche transistors. By utilizing the base-emitter short contact generation method, the output pulse voltage can be adjusted by varying the input voltage. Furthermore, it is demonstrated that placing a picofarad (pF)-level capacitor in parallel with the avalanche transistor reduces the conduction time, thereby decreasing the falling edge of the output pulse and increasing its slope. Experimental results from a series test involving four avalanche transistors, as constructed in this study, indicate that with an input voltage ranging from 200 to 500 V, the output voltage amplitude is adjustable from 1020 V to 1270 V. When a 15 pF capacitor is added in parallel, the amplitude increases from 1270 V to 1320 V, while the falling edge decreases from 1.27 ns to 1.00 ns. Consequently, the slope rises from 1.00 kV/ns to 1.32 kV/ns. Additionally, the circuit was enhanced, and the fast leading-edge pulse of the output served as the trigger pulse for testing a 500 V withstand voltage FID, yielding an output pulse amplitude of 965 V and a falling edge of 320 ps.