A 0.3 V Nanowatt Bulk-Driven CCII− in 0.18-µm CMOS for Ultra-Low-Power Current-Mode Interfaces
Abstract
A 0.3 V nanowatt CCII− is presented in 0.18 μm TSMC CMOS, targeting ultra-low-power current-mode interfaces. Post-layout extracted simulations demonstrate correct conveying operation with a total DC power consumption of less than 2.40 nW. The low-frequency tracking factors evaluated at 1 Hz are β0=0.9452 (−0.48 dB) and α0=0.9609 (≈−0.35 dB), with −3 dB bandwidths of 22.95 kHz and 63.95 kHz for the voltage and current transfers, respectively. Small-signal extraction confirms the intended impedance profile, yielding RX=46.73 MΩ, RZ=1.204 GΩ, and a very high input resistance RY=392 GΩ. Robustness is verified through full PVT and mismatch analyses, showing stable functionality across process corners, a 0–80 °C temperature range, and 270–330 mV supply variations while maintaining nanowatt-level dissipation.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Advancements in Semiconductor Devices and Circuit Design
Neuroscience and Neural Engineering
Publication details
- Journal / source
- Journal of Low Power Electronics and Applications
- Publisher
- MDPI AG
- Volume
- 16
- Issue
- 2
- Pages
- 12–12
- Publication date
- 8 April 2026
- Language
- EN