Feature Comparison and Process Optimization of Multiple Dry Etching Techniques Applied in Inner Spacer Cavity Formation of GAA NSFET

The inner spacer module, which profoundly affects the final performance of a device, is a critical component in GAA NSFET (Gate-all-around Nanosheet Field Effect Transistor) manufacturing and necessitates systematic optimization and fundamental innovation. This work aims to develop an advanced SiGe etching process with high selectivity, uniformity and low damage to achieve an ideal inner spacer structure for logic GAA NSFETs. For three distinct dry etching technologies, ICP (Inductively Coupled Plasma Technology), RPS (Remote Plasma Source) and Gas Etching, we evaluated their potential and comparative advantages for inner spacer cavity etching under the same experimental conditions. The experimental results demonstrated that Gas Etching technology possesses the uniquely high selectivity of the SiGe sacrificial layer, making it the most suitable approach for inner spacer cavity etching to reduce Si nanosheet damage. Based on the results, in the stacked structures, the SiGe/Si selectivity ratio exhibited in Gas Etching is ~9 times higher than ICP and ~2 times higher than RPS. Through systematic optimization of pre-clean conditions, temperature and chamber pressure control, we successfully achieved a remarkable performance target of cavity etching: the average SiGe/Si etching selectivity is ~56, the inner spacer shape index is 0.92 and the local etching distance variation is only 0.65 nm across different layers. These findings provide valuable guidance for equipment selection in highly selective SiGe etching and offer critical insights into key process module development for GAA NSFETs.