Vertically stacked two-layer silicon quantum dots with selective bottom layer control via substrate bias for 3D integration

Abstract As a crucial step toward scalable three-dimensional (3D) quantum dot (QD) architectures to increase quantum bit (qubit) density, we demonstrated a vertically stacked, two-layer silicon (Si) parallel QD device in which the bottom QD can be selectively tuned by substrate bias ( V Sub ). Electrical measurements at 4 K revealed distinct conduction behaviors: the top QD remains insensitive to V Sub , whereas the bottom QD exhibits clear shifts with V Sub , which was confirmed by Technology Computer-Aided Design simulations. Charge stability diagrams further confirmed this asymmetry, showing systematic modulation only in the bottom QD. These results establish V Sub as a practical method for selective bottom QD control, thereby demonstrating vertical addressability as a key feature for scalable 3D Si QD architectures.