A novel SiC trench JFET with 2.5 MeV high-energy ion implantation and floating trench field limiting ring termination

Abstract A 1550 V SiC trench junction field-effect transistor (JFET) with a new floating trench field limiting ring termination is fabricated through high-energy and trench sidewall ion implantations in this letter. In the proposed device, a 2.5 MeV high-energy nitrogen ion implantation is carried out to create a deep n-type current spreading layer, effectively reducing the channel region resistance. And the p-type gate region is performed through sidewall aluminum ion implantations after the gate trench etching. The pitch size of the device is only 2.2 μm, which is much smaller than the SiC trench MOSFET device. The results show that the breakdown voltage of the device is over 1550 V with a specific on-resistance of 2.2 mΩ cm 2 at 2 V gate-to-source voltage. The results suggest that the strategy of high-energy/sidewall ion implantations combined with the new termination could be an effective solution for achieving high-performance SiC JFET devices without the need for costly multi-layer epitaxy SiC wafers.