Statistical capacitance measurement and analysis of Si trench capacitors using array test circuit

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Authors: Ryoya Nishimaki, Koga Saito, Takezo Mawaki, Ken Miyauchi, Rihito Kuroda
Cited by: 1
References: 17

Abstract

Abstract A statistical and accurate capacitance measurement is crucial for investigating electrical characteristics and inter-element variation thereof in semiconductor devices on chips. In this publication, measurements and analysis using the developed array test circuit are presented, which consists of numerous devices under test (DUT), each with a practical dimension. The measured Si trench capacitors (TCs) have two types of electrode connection polarities to verify the effect of parasitic capacitances intrinsic to the DUT. By applying the adequate connection, C-V curves from the proposed chip and a conventional analyzer were in good agreement. Additionally, the relative standard deviation for 732 TCs was less than 0.240%, which demonstrated the developed high-precision capacitance measurement. Within the practical bias range, TCs’ capacitance variation with voltage was sufficiently small, especially in the electrode connection to employ the inversion regime. The developed technology is effective for statistical capacitance measurement of fF to pF range capacitors, supporting various TC applications.

Fields of Study & Subjects

Ferroelectric and Negative Capacitance Devices Semiconductor materials and interfaces Advancements in Semiconductor Devices and Circuit Design

Publication details

Journal / source
Japanese Journal of Applied Physics
Publisher
IOP Publishing
Volume
65
Issue
5
Pages
05SP31–05SP31
Publication date
24 February 2026