Fast and Accurate Jitter Amplification Modeling With Variable Pulse Width Response for Statistical BER Analysis in Chiplet Interconnects and Beyond
Abstract
In this paper, we investigate Statistical Bit Error Rate (BER) analysis for low-loss short-reach chiplet interface and high-loss long-reach serial interface. We used jitter filtering to account for the residue jitter not tracked by a forwarded clock system and proposed a fast and exact Statistical BER method to account for the Tx jitter amplification effect in a high-loss channel. Our proposed method achieves a linear computation complexity.
Fields of Study & Subjects
Low-power high-performance VLSI design
Advancements in PLL and VCO Technologies
Electromagnetic Compatibility and Noise Suppression
Publication details
- Publication date
- 7 January 2026
- Document type
- Preprint