A Tunable RF Self-Interference Canceler with Highly-Accelerated, Machine-Learning-Based Adaptation for Full-Duplex Radio Applications

Future full-duplex (FD) radio systems require highly tunable self-interference (SI) cancelers with rapid adaptation to mitigate dynamic SI profiles in wireless environments. This paper presents a 2.4 GHz RF SI canceler chip with extensive tuning capabilities that operates with a machine learning-augmented adaptation loop for FD transceivers. The proposed design improves the depth of SI cancellation, canceler linearity, and convergence speed. The prototype canceler chip, fabricated using a 40 nm CMOS process, features enhanced tuning capabilities of the filter coefficients, delay spread, and linearity. A custom-designed neural network (NN) is implemented on an FPGA within a Xilinx RFSoC evaluation board to accelerate the convergence time during the canceler's adaptation process. The RF canceler, realized as a 6-tap complex finite impulse response (FIR) filter with programmable delay spread, achieves 32 dB SI cancellation over a 40 MHz bandwidth in a real wireless channel and an input-referred third-order intercept point (IIP 3) of +38 dBm. The NN computes an initial canceler setting, followed by a dithered linear search algorithm, achieving a convergence time of less than 10 ms. The SI canceler chip demonstrates a maximum group delay variation of 2 ns, an output noise density of-184 dBV/ √ Hz, and an S 11 of-10 dB across 2.3-2.8 GHz. The RF SI canceler chip occupies an active area of approximately 1.8 mm 2 and consumes 39 mW.