V-PUF: An Ephemeral-Key Decentralized Architecture for Verifiable Hardware Authentication

In recent years, the globalization of the semiconductor supply chain has introduced severe security vulnerabilities related to counterfeit hardware and unauthorized overproduction. This poses serious risks to modern computing infrastructure, creating a pressing need for hardware authentication methodologies that are efficient, reproducible, and publicly verifiable. While Physical Unclonable Functions (PUFs) provide a robust hardware root of trust, existing protocols typically rely on centralized databases of secrets, which create single points of failure and trust. To address these challenges, we propose V-PUF, a novel ephemeral-key architecture that reconciles the stochastic nature of raw silicon physics with the requirements of decentralized public verifiability. Unlike traditional approaches that mask secrets for closed-loop verification, V-PUF architecturally integrates noisy silicon entropy into a rigid cryptographic framework optimized for constrained hardware. We introduce a "Regenerateand-Prove" paradigm, utilizing a lightweight Low-Density Parity Check (LDPC) decoder to derive transient deterministic seeds for Elliptic Curve based (Ed25519) proof generation from noisy PUF data. Our proposed architecture harnesses the intrinsic ephemerality of SRAM PUFs to establish hardware-level protections, ensuring that the VRF private keys are reconstructed only for the very short period required for proof generation. We present a formal security analysis of this Noisy-Input VRF model and evaluate a full stack implementation on a commodity STM32L152RE microcontroller. Experimental results demonstrate that our architecture achieves robust reliability with a False Acceptance Rate (FAR) of 0% and a False Rejection Rate (FRR) of 0% across nominal IoT operating temperatures, while gracefully degrading under extreme thermal stress. The entire protocol stack takes 2.133 seconds and consumes 62.6 mJ per proof, confirming that decentralized, publicly verifiable hardware authentication is viable for low-power edge devices.