An Area Efficient Lifting Wavelet for ECG R-peak Detection Applications

Read full text
Authors: Ravi Teja C., D. S. V. J. P. Koteswari M., K Y Kavitha, Bhoomika V, Imran S.
Cited by: 2
References: 7

Abstract

Noise removal is a vital pre-processing step in wearable ECG devices for accurate arrhythmia detection. This paper proposes a hardware-efficient, multiplier-less FPGA architecture for ECG denoising using a lifting-based wavelet transform. A universal thresholding function with soft thresholding enhances signal quality, while a modified lifting-based DWT eliminates multipliers and simplifies computation. An optimized median calculation and thresholding method remove the need for comparators in VLSI design. ECG data from the MIT-BIH databases validate the approach, achieving an SNR improvement of 7.4 dB and an MSE of 0.0206. FPGA implementation on the Nexys 4 DDR board demonstrates low hardware usage and a high operating frequency of 166 MHz, outperforming existing designs.

Fields of Study & Subjects

ECG Monitoring and Analysis Cardiac electrophysiology and arrhythmias Image and Signal Denoising Methods

Publication details

Journal / source
Journal of Electronics and Informatics
Publisher
Inventive Research Organization
Volume
7
Issue
4
Pages
267–280
Publication date
6 January 2026