Signal Temporal Logic Evaluation and Synthesis Using Deep Reachability Analysis and Layered Control Architecture

We propose a signal temporal logic (STL)-based framework that checks the feasibility of a mission described in STL and synthesizes control to safely execute it. The proposed framework evaluates the safety and reliability of operation through two phases. First, the proposed framework assesses the feasibility of STL by computing a backward reachable tube (BRT), which captures all states that can satisfy the given STL. The proposed framework accommodates the multiple reach-avoid (MRA) problem to address more general STL specifications and leverages a deep neural network to alleviate the computation burden for reachability analysis, significantly reducing the inference time compared to a baseline method. We further propose a layered planning and control architecture that combines mixed-integer linear programming (MILP) for global planning with model predictive control (MPC) as a local controller for the given STL. Consequently, the proposed framework can robustly handle unexpected behavior of obstacles that are not described in the environment information or STL, thereby providing reliable mission performance. Our numerical simulations demonstrate that the proposed framework can successfully compute BRT for a given STL and perform the mission.