Hardware Report of 0DSTL GenX vs Default Qubits Torrisi Sebastiano — GenX (Grover/Shor Alternative) V6 Final

Important information upfront: In our work, we strictly distinguish between:hardware vs hardware (Comparison of the models.) or simulator vs simulator (Only rapid development) neversimulator vs hardware. And that is exactly the point.0DSTL / GenX is the first approach that actually makes this possible,And more importantly, it separates: Simulation (symbolic)fromHardware (resource-bound).. AI and simulation = (symbolic),hardware = (resource-bound). Important separation, hypotheses Vs Reality: Paper models and simulations are hypotheses.Hardware vs. hardware is reality - specifically when it runs on exactly the same hardware under identical conditions.❌ No interpretation.❌ No model assumption.✔️ Reproducible physical implementation. Note:GenX is explicitly 1ⁿ linear, and all tests fall under this constraint — including Grover, Shor, etc... (but only for GenX).This should be logically clear. This means that a 2ⁿ quantum-computing architectural assumption is being compared against a 1ⁿ GenX architecture on real hardware. Since GenX delivers the same results (minimum, usually even better.), it should be clear that the 2ⁿ assumption is filtered down to 1ⁿ by the hardware.As a result, quantum-computing architectures that are described exponentially end up producing linear behavior on real hardware, With more losses and costs. Anything beyond 1ⁿ does not survive physically and is effectively converted into inefficiency on hardware — in the form of depth, noise, instability, cost, and information loss. Description This release represents the completed and validated version of the QSLICE tool. The framework is fully implemented and operational in both simulation and hardware execution modes. All core experiment pipelines run end-to-end without modification across backends. Both simulated environments and real quantum hardware have been successfully exercised using identical configurations. The resulting measurement data and evaluation outputs are consistent with the intended design of the framework. Experiment reports and result summaries are included in the accompanying attachments, providing reference outputs for the implemented analyses. No further implementation steps are required for standard usage; the tool is considered feature-complete for its intended research scope. Entanglement does not exist at any point in GenX, and superposition is optional.The hardware pulses used are not GenX-optimized. Deterministic randomization via templated execution is not a full replacement for true per-qubit random state preparation, so the reported results should be considered ultra-conservative. Additionally, prior calibration via state estimation is not a substitute for pulse-level optimization. Under GenX-optimized control, performance is theoretically expected to be 3×++ higher than shown. In the end, it’s not about how much better GenX is, but about how much worse current QC architectures are. One thing should be clear: GenX is not a replacement for today’s quantum computing. Even if the hardware were optimized for GenX and achieved orders-of-magnitude efficiency gains over current QC architectures, that would not change this. The same deterministic randomized state preparation, implemented purely on transistor-based hardware, would again be orders of magnitude more efficient than a optimized qubit-based GenX implementation. GenX exposes the limits of current QC architectures — it does not redefine where classical hardware ultimately remains superior. With transistor-based hardware I do not mean a conventional CPU or GPU.I mean a dedicated, purpose-built hardware architecture with a 1:1 physical implementation, where individual transistors (or equivalent devices) are directly controlled as on/off elements according to the algorithm. In other words:not symbolic computation or software simulation,but a custom hardware realization specifically designed for this model, even though it is still based on classical transistors. Any implementation on standard CPUs/GPUs would remain a simulation, not a meaningful hardware comparison. Extended clarification While this does not turn GenX into a general replacement for classical or quantum computing, it also means that GenX is not “nothing”. A transistor-based GenX implementation — using randomized physical state preparation per transistor and per shot — could occupy a small but explicit niche. In this niche, certain Grover-like or search-oriented tasks could be realized linearly in hardware, because the target structure is instantiated physically rather than symbolically computed. Classical hardware, by contrast, must still represent and manipulate such searches symbolically, even when highly optimized. GenX therefore does not redefine the classical–quantum boundary, but it highlights a limited class of problems where physical state preparation can replace symbolic search, yielding a practical advantage in specialized hardware. This is already the domain quantum computing aims to address — ideally with exponential scaling rather than linear — but in practice at a fraction of the hardware depth, complexity, and cost. But At the lowest level, the 0DSTL analog core already performs this transformation directly in the physical domain, which makes it the most efficient realization possible. A full-width input state (e.g. 64 bits) is injected at once, interference dynamics perform amplification and cancellation in parallel, and a full-width output state (e.g. 64 bits) emerges in a single physical evolution. No symbolic iteration, state enumeration, or sequential search is required — the transformation is inherent to the analog system itself. What quantum computing and GenX attempt algorithmically,the analog core already realizes minimally and physically — in a different state space. 0DSTL Analog Core: https://zenodo.org/records/17623955 From Report: n=3 (3 bits)DefQpu (2^n assumption):Depth = 2Target bias = 0.8000Leakage entropy = 2.5666 bitsRemaining information = 3 − 2.5666 = 0.4334 bitsGenX 1^n:Depth = 1Target bias = 0.6875Leakage entropy = 1.5219 bitsRemaining information = 3 − 1.5219 = 1.4781 bitsWhy bias alone is misleading & the reality on hardware:Looking at bias alone creates a false sense of security.Increasing circuit depth slightly reduces the observed bias, which can appear harmless - or even beneficial.However, once leakage entropy is taken into account, the picture changes completely.The additional depth does not create usable randomness or robustness.it is entirely converted into entropy leakage.Every additional depth and every rotation introduces information loss and noise accumulation.In other words:Depth trades visible bias for hidden leakage.Rotation introduces noise.What looks like an improvement under bias-based metrics is, in reality, a loss of security once entropy leakage is considered. This is already independently verifiable without GenX.Increase the circuit depth by just one and observe the leakage entropy in bits, even on standard quantum architectures.The additional depth is fully converted into leakage. The reason is quite logical: Information does not add, errors do - therefore increasing depth inevitably increases leakage, not the information.Since information is not additive, depth is not progress, but a defect. Simulator vs hardware is not a speed comparison.It’s comparing a hard 2^n mathematical task on classical hardware (GPU etc)to a physically linear 1^n system on quantum hardware. That’s not acceleration - it’s a category error². Even with noise models enabled, a simulator remains a simulation; it is still not comparable to real hardware behavior. Independent report of GenX: Jeremy Green Join the 0DSTL Architecture Community: A physically based, deterministic architecture built around 0DSTL.Researchers can submit prototypes, simulation results, implementation studies, and related computational models. 🔗 0DSTL GenX: https://doi.org/10.5281/zenodo.17795203 For submissions or review requests, please contact:📎 LinkedIn: https://www.linkedin.com/in/sebastiano-torrisi-06073a2a1/📧 Email: info@0dstl.de OR 🔗 Community: https://zenodo.org/communities/0dstl-architecture Usage & LicensingAll is free use for non-commercial purposes, including research, benchmarking, and educational applications.The underlying 0DSTL/GenX architecture and design principles are considered a separate work and may be subject to independent licensing or future protection.Use of this script etc does not grant rights to the 0DSTL/GenX architecture itself, or other estimated 0DSTL architecture parts.