Energy efficient AI Accelerator Architecture for Edge Devices

Every device such as smartphones, drones, and smart cameras has an integrated AI component. Now, the challenge is to make these devices think faster without draining their batteries. This paper introduces a new AI accelerator chip architecture which is built specifically for edge devices which are resource constrained. Processing cores and memory are arranged in a smarter fashion so as to keep the data close to where it is needed. This cuts down the wasted energy because of constant data movement. It also uses a flexible, dataflow aware compute engine and an optimized on chip memory system to make the most of every computation. It is a strong candidate for real time AI tasks in battery powered environments, where both performance and efficiency matter most.